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[VHDL-FPGA-Verilog] PS2RS232

Description: 这是关于PS2和rs232串口的代码，verilog的，是深入了解串口的好的学习实例。-good code about rs232 and ps2
Platform: | Size: 1770496 | Author: 秦天 | Hits:

[VHDL-FPGA-Verilog] RS232_NIOS_Verilog

Description: 5个文件，包含了RS232的nios实现和Verilog实现方式。其中,RS232的nios核实现只需要按照文件描述可以轻松实现^_^，个人比较推荐！RS232的Verilog实现需要编程，例程方便使用。RS232正在进一步学习中，有兴趣的可以探讨。-the realizition of rs232 interface by niosii uart ip core of Altera.it seems a most conveniet way.
Platform: | Size: 685056 | Author: summerooooo | Hits:

[VHDL-FPGA-Verilog] uart_EP3C16_FIFO

Description: Verilog编写的串口RS232收发字符串程序,使用FIFO作为数据缓冲区,有效收发字符串长度为256字节,解决了利用串口调试工具与FPGA通讯只能收发单字节的问题.-Programs for uart/RS232, it can receive and transmit strings.
Platform: | Size: 6756352 | Author: 515666524 | Hits:

[VHDL-FPGA-Verilog] rs232

Description: 使用VERILOG 代码实现的RS232 发送功能，接收一个字符马上回送回来-The RS232 using VERILOG code sending, receiving and sent back immediately return a character
Platform: | Size: 1024 | Author: 徐强 | Hits:

[VHDL-FPGA-Verilog] FPGAandRS232-485VerilogSourcecode

Description: FPGA串行通信口RS232-485构建，RS232和485有选择控制，源程序基于QuartusII6.0用Verilog语言撰写。-FPGA serial communication port RS232-485 build, RS232 and 485 to selectively control, source-based QuartusII6.0 written in Verilog language.
Platform: | Size: 115712 | Author: 吴文 | Hits:

[VHDL-FPGA-Verilog] rs232

Description: 这是用verilog语言写的串口自收发实验的源代码，通过板子实验，采用分层模块化设计，代码大家请仔细阅读-It is written in verilog serial transceiver test from the source code through the board experiments, a stratified modular design, code, we can slowly digest
Platform: | Size: 2048 | Author: 陈泰安 | Hits:

[VHDL-FPGA-Verilog] my_uart1_VERILOG_using-PLL

Description: Verilog uart example, RS232的Verilog例子。PC 发送一个字节（byte）到板子（FPGA），板子回发一个(byte+1).例子简洁，有注释。用到PLL，而且有3：2次数据采用-Verilog uart example，Verilog RS232 example，it s easy to understand, PC send 1 Byte RS232 code to FPGA, FPGA return 1 tht code，but Byte+1， Using PLL
Platform: | Size: 506880 | Author: 林端 | Hits:

[VHDL-FPGA-Verilog] RS232

Description: verilog语言编写的串口收发器，可实现发送什么接受什么的功能，简单修改即可实现想要的功能-verilog UART
Platform: | Size: 2048 | Author: liuheshan | Hits:

[VHDL-FPGA-Verilog] RS232

Description: 利用verilog开发的串口程序，比较基本，包含完整的工程-Use the verilog development of the serial procedures more basic, including complete engineering
Platform: | Size: 4959232 | Author: 给他 | Hits:

[VHDL-FPGA-Verilog] UART-RS232

Description: 用verilog语言描述了uart串口通信实验-Verilog language description of the uart serial communication experiment
Platform: | Size: 286720 | Author: liu | Hits:

[VHDL-FPGA-Verilog] rs232

Description: 一种verilog实现rs232的方法~没啥好说的-A verilog implementation rs232 methods to nothing to say
Platform: | Size: 153600 | Author: 文嵩 | Hits:

[VHDL-FPGA-Verilog] RS232

Description: RS232与电脑串口的通信控制代码，verilog hdl代码，里面包括完整的ISE工程-RS232 and computer serial communication control code, verilog hdl code, which includes a complete ISE works
Platform: | Size: 248832 | Author: wangxiaobin | Hits:

[VHDL-FPGA-Verilog] uart_232

Description: RS232的verilog控制程序，8位数据传输，奇校验，一个停止位，已经过singnaltap验证-RS232 verilog control procedures, the eight data transmission, odd parity, one stop bit, verification has been singnaltap
Platform: | Size: 5306368 | Author: liulu | Hits:

[VHDL-FPGA-Verilog] rs232

Description: 用verilog hdl实现RS232串口通讯-RS232 serial communication with the verilog hdl
Platform: | Size: 481280 | Author: 王菲 | Hits:

[VHDL-FPGA-Verilog] rs232

Description: verilog HDL FPGA串口接受与传输,用于其他电子设备与FPGA之间通过串口进行数据传输-the verilog HDL FPGA serial port receive and transmission, data transmission through the serial port for other electronic equipment and FPGA
Platform: | Size: 2048 | Author: 王浩骏 | Hits:

[VHDL-FPGA-Verilog] verilog-uart-rs232

Description: verilog HDL 描写的uart程序 由PC端接收然后+1返回 等等 东南大学09级4系综合课程设计-verilog HDL description uart program Received by the PC side and then+1 back。 SEU..
Platform: | Size: 588800 | Author: yu | Hits:

[VHDL-FPGA-Verilog] UART_RX

Description: 232串口源程序 verilog实现，频率可调 接受部分-RS232 verilog
Platform: | Size: 1024 | Author: orca | Hits:

[VHDL-FPGA-Verilog] UART_TR

Description: rs232串口通信 verilog代码 发射部分-RS232 verilog
Platform: | Size: 1024 | Author: orca | Hits:

[VHDL-FPGA-Verilog] rs232

Description: rs232串口通信实验4位的串口，verilog源代码。-rs232 serial communication experiment 4 serial, verilog source code
Platform: | Size: 190464 | Author: 廖飞 | Hits:

[MPI] exp6_Uart

Description: xilinx FPGA的rs232 Verilog HDL程序-xilinx FPGA的rs232 Verilog HDL
Platform: | Size: 648192 | Author: 朱明俊 | Hits:
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